The invention relates to a method for memory configuration with input/output [I/O] support, for the storage of data from a processor unit in a processor memory and its input/output via an I/O unit. The invention also relates to an arrangement for carrying out the method.
To avoid heavily loading the CPU with memory management tasks in computers with functional units that must achieve a high data throughput, it is customary to use direct memory access (DMA) units which take over memory management tasks and can independently operate the address and data sides of the memory.
A disadvantage DMA units is that a great deal of programming effort is required in order to ensure that, in operation with multiple functional units, the functional unit operating under especially time-critical conditions, e.g. a processor unit, receives the appropriate priority in data access. A further disadvantage is that a certain time delay always occurs in a DMA request before the required memory access is ready.
It is an object of the invention is to permit a functional unit operating under time-critical conditions, e.g. a processor unit, to have direct memory access that is as delay-free as possible, and in doing so to avoid data collisions that can occur when operating with additional functional units, e.g. an I/O functional unit with direct memory access.